The violation of the operating conditions of the flip-flops can cause them to go into an unstable (metastable) state. Metastability can occur when both inputs to a simple latch are set at a logic high (11) and are subsequently set at a logic low (00). Metastability can cause the latch outputs to oscillate unpredictably in a statistically known manner. Such metastable values are then detected by other circuitry as different logic states. Metastable latches also arrive at a random stable state after a period of time.
It has been found that intentionally inducing metastability provides the ability to harness the unpredictability of metastable flip-flop outputs as a random number generator.
The use of multiple meta-stable elements to generate a random event has been the subject of previous patent applications for random number generators by the current inventors. In such a random number generator, there are two latches that are placed in a metastable state, which resolves to a known but unpredictable condition. The outputs of the latches are compared, and if they differ, then a bit value is chosen from an unbiased stream of bits. This method works especially well if the meta-stable elements are biased (meaning that they produce more ones than zeros, or vice versa).
A drawback of previous metastable random number generator circuits was that the metastable elements were symmetrical. In some cases a tunable delay has been introduced for at least one of the elements because there are sometimes slight differences in even identical circuits due to manufacturing variations, temperature variations, etc.